Run-Time Mitigation of Power Budget Variations and Hardware Faults by Structural Adaptation of FPGA-Based Multi-Modal SoPC.
Dimple SharmaLev KirischianValeri KirischianPublished in: Comput. (2018)
Keyphrases
- multi modal
- hardware implementation
- hardware architecture
- hardware design
- field programmable gate array
- software implementation
- embedded systems
- power consumption
- multi modality
- reconfigurable hardware
- audio visual
- low cost
- embedded processors
- hardware and software
- cross modal
- computational power
- hardware architectures
- fault diagnosis
- computing systems
- ibm power processor
- high dimensional
- single chip
- semantic concepts
- feature selection
- massively parallel
- parallel computing
- image processing algorithms
- humanoid robot