Login / Signup

A Noise Reduction 12-bit 125-MSPS SAR ADC with Modified Asynchronous Logic Regulation Technique.

Daiguo XuHan YangXing ShengTing SunGuangbing ChenShiliu XuCan ZhuJianan WangDongbin Fu
Published in: J. Circuits Syst. Comput. (2021)
Keyphrases