Optimizing Transformations of Stencil Operations for Parallel Cache-based Architectures.
Federico BassettiKei DavisPublished in: PDPTA (1999)
Keyphrases
- memory hierarchy
- multi core processors
- computer architecture
- ibm sp
- parallel processing
- processing units
- parallel architectures
- parallel computers
- processing elements
- parallel implementation
- query processing
- parallel computing
- parallel programming
- shared memory multiprocessor
- functional units
- multiprocessor systems
- shared memory
- main memory
- memory access
- parallel execution
- hit rate
- computer systems
- miss rate
- mobile devices
- data structure