Low-power memory mapping through reducing address bus activity.
Preeti Ranjan PandaNikil D. DuttPublished in: IEEE Trans. Very Large Scale Integr. Syst. (1999)
Keyphrases
- low power
- high speed
- power consumption
- low cost
- power reduction
- power dissipation
- high power
- single chip
- wireless transmission
- cmos technology
- digital signal processing
- vlsi circuits
- real time
- vlsi architecture
- low power consumption
- delay insensitive
- image sensor
- logic circuits
- random access
- main memory
- signal processing
- energy dissipation
- nm technology
- gate array
- ultra low power