A Novel Reconfigurable Architecture of a DSP Processor for Efficient Mapping of DSP Functions using Field Programmable DSP Arrays.
Amitabha SinhaMitrava SarkarSoumojit AcharyyaSuranjan ChakrabortyPublished in: CoRR (2013)
Keyphrases
- systolic array
- reconfigurable architecture
- digital signal processing
- signal processing
- digital signal processor
- data flow
- high speed
- parallel architecture
- digital signal processors
- digital signal
- computer vision and image processing
- real time image processing
- database
- neural network
- general purpose
- verilog hdl
- parallel processing
- computationally efficient
- low cost
- artificial intelligence
- real time