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An FPGA-based scalable simulation accelerator for tile architectures.
Shinya Takamaeda-Yamazaki
Ryosuke Sasakawa
Yoshito Sakaguchi
Kenji Kise
Published in:
SIGARCH Comput. Archit. News (2011)
Keyphrases
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field programmable gate array
simulation model
data sets
neural network
image processing
parallel implementation
hardware software
database
real time
case study
low cost
embedded systems
application specific
hardware architecture