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Approach to design a compact reversible low power binary comparator.
Hafiz Md. Hasan Babu
Nazir Saleheen
Lafifa Jamal
Sheikh Muhammad Sarwar
Tsutomu Sasao
Published in:
IET Comput. Digit. Tech. (2014)
Keyphrases
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low power
power consumption
single chip
low cost
vlsi architecture
high speed
low power consumption
digital signal processing
gate array
logic circuits
power dissipation
cmos technology
high power
wireless transmission
ultra low power
power reduction
mixed signal
design considerations