An architecture design for anti-jamming circuit with low power and low area cost in high-precision GNSS receiver chip.
Yuheng YangXueyong LiuJie ChenPublished in: IEICE Electron. Express (2019)
Keyphrases
- low power
- high precision
- low power consumption
- cmos technology
- power dissipation
- high speed
- single chip
- logic circuits
- mixed signal
- low cost
- power consumption
- gate array
- power reduction
- high recall
- circuit design
- nm technology
- digital signal processing
- vlsi circuits
- vlsi architecture
- chip design
- high power
- real time
- low voltage
- achieve high precision
- image sensor
- cmos image sensor
- wireless transmission
- ultra low power
- multi channel
- vlsi implementation
- signal processor
- design process
- data acquisition
- delay insensitive
- evolvable hardware
- parallel processing
- digital circuits
- design methodology
- application specific
- multipath