A Convolutional Code for On-chip Interconnect Crosstalk Reduction.

Antoine Courtay Emmanuel Boutillon Johann Laurent

Published in: ISCAS (2009)

Keyphrases

high speed
power dissipation
low cost
source code
processor core
analog vlsi
sparse coding
high density
real time
static analysis
host computer
vlsi implementation
single chip
reduction method
correlation analysis
low power
machine learning