Designing SRAM Using CMOS and CNTFET at 32 nm Technology.

Arushi Shrivastava Parul Damahe Vijay Rao Kumbhare Manoj Kumar Majumder

Published in: iSES (2019)

Keyphrases

nm technology
power consumption
low power
power dissipation
low cost
power management
high speed
single chip
pattern recognition
cmos technology
random access memory