A low voltage-power 13-bit 16 MSPS CMOS pipelined ADC.
Ming-Huang LiuKuo-Chan HuangWei-Yang OuTsung-Yi SuShen-Iuan LiuPublished in: IEEE J. Solid State Circuits (2004)
Keyphrases
- low voltage
- random access memory
- power management
- power consumption
- analog to digital converter
- cmos technology
- design considerations
- power line
- mixed signal
- low power
- reactive power
- energy efficiency
- real time
- data management
- energy saving
- energy consumption
- ibm power processor
- data flow
- parallel processing
- learning environment