Parallel hardware implementation of data hiding scheme for quality access control of grayscale image based on FPGA.
Amit PhadikarHimadri S. MandalTien-Lung ChiuPublished in: Multidimens. Syst. Signal Process. (2020)
Keyphrases
- hardware implementation
- access control
- gray scale
- field programmable gate array
- pipelined architecture
- data hiding scheme
- parallel architecture
- fine grained
- grayscale images
- binary images
- dedicated hardware
- fpga implementation
- color images
- efficient implementation
- signal processing
- gray level
- security policies
- hardware architecture
- role based access control
- fpga device
- high quality
- data hiding
- parallel computing
- image processing algorithms
- fpga technology
- halftone images
- error diffusion
- image reconstruction
- general purpose processors
- general purpose
- computer vision