Login / Signup

Verification of Scheduling of Conditional Behaviors in High-Level Synthesis.

Ramanuj ChoukseyChandan Karfa
Published in: IEEE Trans. Very Large Scale Integr. Syst. (2020)
Keyphrases
  • high level synthesis
  • grid workflow
  • scheduling algorithm
  • scheduling problem
  • parallel machines
  • parallel architecture
  • resource allocation
  • model checking
  • resource constraints
  • image processing
  • power consumption