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Hard-Limiting Performance Analysis of 2-D Optical Codes Under the Chip-Asynchronous Assumption.
Chia-Cheng Hsu
Guu-chang Yang
Wing C. Kwong
Published in:
IEEE Trans. Commun. (2008)
Keyphrases
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low cost
high speed
high density
error correction
image sensor
analog vlsi
printed circuit boards
asynchronous communication
single chip
physical design
decoding algorithm
focal plane
vlsi implementation
search algorithm
programmable logic
level parallelism
evolutionary algorithm