18.2 A 1.2V 20nm 307GB/s HBM DRAM with at-speed wafer-level I/O test scheme and adaptive refresh considering temperature distribution.
Kyomin SohnWon-Joo YunReum OhChi-Sung OhSeong-Young SeoMin-Sang ParkDong-Hak ShinWon-Chang JungSang-Hoon ShinJe-Min RyuHye-Seung YuJae-Hun JungKyung-Woo NamSeouk-Kyu ChoiJaewook LeeUksong KangYoung-Soo SohnJung-Hwan ChoiChi-Wook KimSeong-Jin JangGyo-Young JinPublished in: ISSCC (2016)