2-V/100-ns 1T/1C nonvolatile ferroelectric memory architecture with bitline-driven read scheme and nonrelaxation reference cell.
Hiroshige HiranoToshiyuki HondaNobuyuki MoriwakiTetsuji NakakumaAtsuo InoueGeorge NakaneShigeo ChayaTatsumi SumiPublished in: IEEE J. Solid State Circuits (1997)