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Formal Verification of VHDL Descriptions in the Prevail Environment.

Dominique BorrioneLaurence V. PierreAshraf M. Salem
Published in: IEEE Des. Test Comput. (1992)
Keyphrases
  • formal verification
  • model checking
  • real time
  • model checker
  • bounded model checking
  • mobile robot
  • hardware implementation
  • hardware design
  • automated verification