Using carry-save adders in low-power multiplier blocks.
Viv A. BartlettAndrew G. DempsterPublished in: ISCAS (4) (2001)
Keyphrases
- low power
- power consumption
- low cost
- high speed
- power dissipation
- cmos technology
- single chip
- high power
- low power consumption
- wireless transmission
- digital signal processing
- image sensor
- block size
- real time
- vlsi architecture
- vlsi circuits
- hardware implementation
- power reduction
- delay insensitive
- video camera
- gate array