Effects of delay models on peak power estimation of VLSI sequential circuits.

Michael S. Hsiao Elizabeth M. Rudnick Janak H. Patel

Published in: ICCAD (1997)

Keyphrases

power dissipation
high speed
statistical models
parameter estimation
power reduction
probabilistic model
vlsi circuits
parametric models
estimation algorithm
monte carlo simulation
power consumption
statistical model
signal processing
neural network
density estimation
complex systems
chip design