Single-chip multi-processor integrating quadruple 8-way VLIW processors with interface timing analysis considering power supply noise.
Satoshi ImaiAtsuki InoueMotoaki MatsumuraKenichi KawasakiAtsuhiro SugaPublished in: ASP-DAC (2006)
Keyphrases
- multi processor
- power supply
- single chip
- single processor
- embedded processors
- shared memory
- program execution
- low power
- signal processor
- low cost
- multi core processors
- distributed memory
- parallel processors
- parallel architectures
- intelligent control
- high frequency
- rbf neural network
- image sensor
- parallel programming
- parallel algorithm
- power consumption
- genetic algorithm
- high speed
- markov random field
- signal processing
- embedded systems
- parallel computing
- signal to noise ratio
- message passing