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A 45 nm 8-Core Enterprise Xeon¯ Processor.
Stefan Rusu
Simon M. Tam
Harry Muljono
Jason Stinson
David Ayers
Jonathan Chang
Raj Varada
Matt Ratta
Sailesh Kottapalli
Sujal Vora
Published in:
IEEE J. Solid State Circuits (2010)
Keyphrases
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high speed
information management
enterprise architecture
web services
database systems
input output
data sets
data mining
information systems
computer architecture
high end
single chip
parallel architectures
memory management
single processor
industry standard