Generating synthetic benchmark circuits for accelerated life testing of field programmable gate arrays using genetic algorithm and particle swarm optimization.
L. SrivaniN. H. V. Krishna GiriShankar GaneshV. KamakotiPublished in: Appl. Soft Comput. (2015)
Keyphrases
- particle swarm optimization
- genetic algorithm
- field programmable gate array
- hardware software co design
- multi objective
- pso algorithm
- hardware implementation
- embedded systems
- differential evolution
- fpga technology
- programmable logic
- parallel computing
- hardware and software
- particle swarm optimization pso
- hardware design
- computing systems
- fitness function
- high speed
- hardware architecture
- parallel architectures
- image processing algorithms
- simulated annealing
- evolutionary algorithm
- pattern recognition
- digital signal processing
- evolutionary computation
- parallel programming
- hw sw
- signal processing
- high end
- software implementation
- application specific integrated circuits
- massively parallel
- host computer
- hardware software
- neural network
- open source
- parallel algorithm
- data management