5.5-V I/O in a 2.5-V 0.25-μm CMOS technology.

Anne-Johan Annema Govert J. G. M. Geelen Peter C. de Jong

Published in: IEEE J. Solid State Circuits (2001)

Keyphrases

cmos technology
low power
spl times
low voltage
power consumption
input output
parallel processing
power dissipation
mixed signal
low cost
main memory
file system
image sensor
high speed
random access memory
pattern recognition
external memory
design considerations
image analysis