Login / Signup

A superscalar architecture to exploit instruction level parallelism.

Gordon B. StevenBruce ChristiansonRoger CollinsRichard D. PotterFleur L. Steven
Published in: Microprocess. Microsystems (1997)
Keyphrases
  • level parallelism
  • instruction set
  • floating point
  • application specific
  • computer architecture
  • general purpose
  • embedded systems
  • memory bandwidth
  • artificial intelligence
  • low cost
  • parallel processing
  • memory access