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A 0.9-V 12-bit 100-MS/s 14.6-fJ/Conversion-Step SAR ADC in 40-nm CMOS.
Jian Luo
Jing Li
Ning Ning
Yang Liu
Qi Yu
Published in:
IEEE Trans. Very Large Scale Integr. Syst. (2018)
Keyphrases
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analog to digital converter
synthetic aperture radar
low cost
real time
sar images
low power
cmos technology
random access memory
multiresolution
post processing
parameter estimation
power consumption
silicon on insulator