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Low power memristor-based ReRAM design with Error Correcting Code.
Dimin Niu
Yang Xiao
Yuan Xie
Published in:
ASP-DAC (2012)
Keyphrases
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low power
single chip
high speed
power consumption
low power consumption
low cost
vlsi architecture
logic circuits
gate array
power dissipation
digital signal processing
cmos technology
error correcting codes
quantum mechanics
power reduction
mixed signal
nm technology
lower bound