Dynamically Reconfigurable NoC using a deadlock-free flexible routing algorithm with a low hardware implementation cost.
Ernesto Villegas CastilloJiang Chau WangGabriele MiorandiDavide BertozziPublished in: LASCAS (2015)
Keyphrases
- routing algorithm
- hardware implementation
- deadlock free
- network on chip
- wireless sensor networks
- shortest path
- ad hoc networks
- routing protocol
- multipath
- signal processing
- efficient implementation
- field programmable gate array
- energy consumption
- image processing algorithms
- network traffic
- end to end delay
- computing environments
- interconnection networks
- sensor networks
- machine learning
- data transmission
- mobile ad hoc networks
- wireless networks