A 0.042-mm2 fully integrated analog PLL with stacked capacitor-inductor in 45nm CMOS.
Shih-An YuPeter R. KingetPublished in: ESSCIRC (2008)
Keyphrases
- fully integrated
- cmos image sensor
- analog vlsi
- metal oxide
- power supply
- solid state
- circuit design
- cmos technology
- focal plane
- high speed
- mixed signal
- silicon on insulator
- workflow management
- transmission line
- x ray
- floating gate
- low power
- infrared
- nm technology
- object oriented
- dynamic range
- power consumption
- knowledge management
- case study