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Vertical Writes: Closing the Throughput Gap between Deeply Scaled STT-MRAM and DRAM.
Engin Ipek
Florian Longnos
Shihai Xiao
Wei Yang
Published in:
IEEE Comput. Archit. Lett. (2018)
Keyphrases
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design considerations
main memory
response time
low voltage
flash memory
high density
morphological operators
neural network
random access
databases
buffer size
channel capacity
higher throughput