CASH: Revisiting Hardware Sharing in Single-Chip Parallel Processors.

Romain Dolbeau André Seznec

Published in: J. Instr. Level Parallelism (2004)

Keyphrases

single chip
parallel processors
low power
low cost
software implementation
highly parallel
search problems
precedence constraints
embedded processors
signal processor
image sensor
hardware and software
orders of magnitude
scheduling problem
image processing
high speed
contract algorithms