Is RISC-V ready for HPC prime-time: Evaluating the 64-core Sophon SG2042 RISC-V CPU.

Nick Brown Maurice Jamieson Joseph K. L. Lee Paul Wang

Published in: SC Workshops (2023)

Keyphrases

application specific
instruction set
connected component labeling
low power consumption
hardware architecture
high performance computing
general purpose
binary images
fault tolerance
low power
memory access
massively parallel
real time
operating system
response time
sensor networks
genetic algorithm