CNPC deinterleaver implementation to increase hardware logic utilization on FPGA.
Gwonhan MunHee Wook KimDeaHo KimPublished in: ICAIIC (2021)
Keyphrases
- hardware implementation
- hardware architecture
- software implementation
- dedicated hardware
- field programmable gate array
- hardware architectures
- fpga technology
- low cost
- hardware design
- reconfigurable hardware
- xilinx virtex
- fpga implementation
- real time
- fpga hardware
- fpga device
- parallel hardware
- graphics cards
- efficient implementation
- computing platform
- vlsi implementation
- parallel architecture
- signal processing
- hardware description language
- computational power
- logic programming
- embedded systems
- computer systems
- programmable logic
- computing systems
- high level language
- general purpose processors
- high speed
- circuit design
- hardware software
- instruction set
- image processing algorithms
- digital circuits
- single chip