An 11-b 300-MS/s Double-Sampling Pipelined ADC With On-Chip Digital Calibration for Memory Effects.
Takuji MikiTakashi MorieToshiaki OzekiShiro DoshoPublished in: IEEE J. Solid State Circuits (2012)
Keyphrases
- analog to digital converter
- sigma delta
- circuit design
- mixed signal
- high speed
- cmos image sensor
- random access memory
- camera calibration
- low cost
- random sampling
- memory subsystem
- single chip
- digital signal processors
- data flow
- vlsi implementation
- sample size
- programmable logic
- memory space
- multi channel
- low power
- memory requirements
- main memory
- windows xp
- image sensor
- multi view