A 40-Gb/s CMOS clocked comparator with bandwidth modulation technique.
Yusuke OkaniwaHirotaka TamuraMasaya KibuneDaisuke YamazakiTsz-Shing CheungJunji OgawaNestoras TzartzanisWilliam W. WalkerTadahiro KurodaPublished in: IEEE J. Solid State Circuits (2005)
Keyphrases
- low power
- high speed
- hd video
- power consumption
- low cost
- network bandwidth
- video streaming
- power supply
- storage capacity
- single chip
- congestion control
- high bandwidth
- delay insensitive
- cmos technology
- ultra low power
- vlsi circuits
- low voltage
- high definition
- image sensor
- transmission scheme
- focal plane
- optical networks
- bandwidth requirements
- bandwidth utilization
- modulation scheme
- real time