A low-power and high-speed quaternary interconnection link using efficient converters.

Jean-Marc Philippe Sébastien Pillement Olivier Sentieys

Published in: ISCAS (5) (2005)

Keyphrases

low power
high speed
power consumption
low cost
high power
wireless transmission
single chip
digital signal processing
delay insensitive
low power consumption
vlsi architecture
logic circuits
general purpose
energy dissipation
vlsi circuits
image sensor
highly efficient
efficient implementation
gate array