A 1.97 TFLOPS/W Configurable SRAM-Based Floating-Point Computation-in-Memory Macro for Energy-Efficient AI Chips.
Yangzhan MaiMingyu WangChuanghao ZhangBaiqing ZhongZhiyi YuPublished in: ISCAS (2023)
Keyphrases
- energy efficient
- floating point
- wireless sensor networks
- data transmission
- floating point arithmetic
- energy consumption
- fixed point
- sensor networks
- base station
- energy efficiency
- power consumption
- memory bandwidth
- artificial intelligence
- floating point unit
- high speed
- instruction set
- random access memory
- routing protocol
- routing algorithm
- ad hoc networks
- intelligent systems
- main memory
- communication networks
- computing systems
- processing elements
- dynamical systems