Dynamic Zero-Sensitivity Scheme for Low-Power Cache Memories.

Yen-Jen Chang Feipei Lai

Published in: IEEE Micro (2005)

Keyphrases

low power
power consumption
low cost
high speed
single chip
digital signal processing
vlsi architecture
high power
low power consumption
power reduction
wireless transmission
real time
digital camera
power dissipation
logic circuits
delay insensitive