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An FPGA-based approach for packet deduplication in 100 gigabit-per-second networks.
Mario Ruiz
Gustavo Sutter
Sergio López-Buedo
Jose Fernando Zazo
Jorge E. López de Vergara
Published in:
ReConFig (2017)
Keyphrases
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internet traffic
social networks
switched networks
high speed
packet switching
network design
computer networks
hardware implementation
hardware design
network layer
network structure
data cleaning
field programmable gate array
complex networks
fpga implementation
packet forwarding
signal processing