Low-power implementation of a high-throughput LDPC decoder for IEEE 802.11N standard.
Junho ChoNaresh R. ShanbhagWonyong SungPublished in: SiPS (2009)
Keyphrases
- high throughput
- low power
- low density parity check
- power consumption
- low cost
- ldpc codes
- high speed
- vlsi architecture
- microarray
- physical layer
- genome wide
- biological data
- decoding algorithm
- error correction
- channel coding
- data acquisition
- cmos technology
- low power consumption
- signal processor
- low complexity
- mass spectrometry data
- message passing
- mass spectrometry
- proteomic data
- distributed video coding
- error resilient
- real time
- gene expression
- channel capacity
- signal to noise ratio
- logic circuits
- frame rate
- multipath
- turbo codes
- power dissipation
- error concealment
- bit error rate