Interpolation-based incremental ECO synthesis for multi-error logic rectification.

Kai-Fu Tang Chi-An Wu Po-Kai Huang Chung-Yang (Ric) Huang

Published in: DAC (2011)

Keyphrases

logic synthesis
asynchronous circuits
incremental learning
error analysis
linear interpolation
multi valued
automated reasoning
multi step
neural network
camera calibration
error rate
bayesian networks
single camera
stereo images
modal logic
image interpolation
incremental version
face recognition