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Optimal design of 6T SRAM bitcells for ultra low-voltage operation.

Amgad A. GhonemMostafa F. FaridMohamed Dessouky
Published in: ICECS (2015)
Keyphrases
  • optimal design
  • low voltage
  • random access memory
  • design considerations
  • leakage current
  • power line
  • cmos technology
  • high speed
  • low power
  • water supply
  • power management
  • power consumption
  • digital images