Ultra Low Power Single-ended 6T SRAM Using 40 nm CMOS Technology.

Chua-Chin Wang I-Ting Tseng

Published in: ICICDT (2019)

Keyphrases

cmos technology
low power
ultra low power
power consumption
high speed
low cost
spl times
low voltage
power dissipation
single chip
mixed signal
parallel processing
image sensor
digital signal processing
embedded dram