A reconfigurable cache memory with heterogeneous banks.
Domingo BenitezJuan C. MoureDolores RexachsEmilio LuquePublished in: DATE (2010)
Keyphrases
- main memory
- memory hierarchy
- memory subsystem
- cache conscious
- memory management
- memory access
- virtual memory
- cache misses
- hardware implementation
- heterogeneous computing
- prefetching
- low cost
- multithreading
- computing power
- compute intensive
- garbage collection
- reconfigurable architecture
- query processing
- data structure
- operating system
- resource consumption
- memory requirements
- read write
- general purpose
- processor core
- data access
- memory usage
- secondary storage
- hash table
- caching scheme
- memory space
- dynamic reconfiguration
- external memory
- hit rate
- dynamic random access memory