Layout Based Frequency Dependent Inductance and Resistance Extraction for On-Chip Interconnect Timing Analysis.

Byron Krauter Sharad Mehrotra

Published in: DAC (1998)

Keyphrases

high speed
low cost
power dissipation
clock frequency
information extraction
automatic extraction
high frequency
frequency distribution
low frequency
high density
vlsi implementation
analog vlsi
phase locked loop
data sets
programmable logic
layout design