A High Layer Scalability TSV-Based 3D-SRAM With Semi-Master-Slave Structure and Self-Timed Differential-TSV for High-Performance Universal-Memory-Capacity-Platforms.
Meng-Fan ChangChih-Sheng LinWei-Cheng WuMing-Pin ChenYen-Huei ChenZhe-Hui LinShyh-Shyuan SheuTzu-Kun KuCha-Hsin LinHiroyuki YamauchiPublished in: IEEE J. Solid State Circuits (2013)