Login / Signup

A High Layer Scalability TSV-Based 3D-SRAM With Semi-Master-Slave Structure and Self-Timed Differential-TSV for High-Performance Universal-Memory-Capacity-Platforms.

Meng-Fan ChangChih-Sheng LinWei-Cheng WuMing-Pin ChenYen-Huei ChenZhe-Hui LinShyh-Shyuan SheuTzu-Kun KuCha-Hsin LinHiroyuki Yamauchi
Published in: IEEE J. Solid State Circuits (2013)
Keyphrases
  • master slave
  • memory capacity
  • low power
  • high efficiency
  • power consumption
  • database
  • sensor networks
  • limited resources