A High Performance Adaptive Miss Handling Architecture for Chip Multiprocessors.
Magnus JahreLasse NatvigPublished in: Trans. High Perform. Embed. Archit. Compil. (2011)
Keyphrases
- multithreading
- signal processor
- distributed memory
- analog vlsi
- parallel architecture
- management system
- vlsi implementation
- real time
- low cost
- signal processing
- shared memory
- embedded dram
- host computer
- level parallelism
- parallel computers
- learning capabilities
- high speed
- cmos image sensor
- high density
- high bandwidth
- highly parallel
- random access memory
- design considerations
- software architecture
- computation intensive
- memory subsystem
- data flow