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Low-Jitter Multi-Output All-Digital Clock Generator Using DTC-Based Open Loop Fractional Dividers.
Ahmed Elkholy
Saurabh Saxena
Guanghua Shu
Amr Elshazly
Pavan Kumar Hanumolu
Published in:
IEEE J. Solid State Circuits (2018)
Keyphrases
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open loop
closed loop
fractional order
feedback control
control system
induction motor
control scheme
control law
artificial intelligence
power consumption
lagrange multipliers
inverted pendulum
decision making
constrained optimization
pid controller
optimal control
dynamic environments
neural network