Design of a Low Power, Sub-Threshold, Asynchronous Arithmetic Logic Unit Using a Bidirectional Adder.
Jiaoyan ChenDilip P. VasudevanEmanuel M. PopoviciMichel P. SchellekensPublished in: DSD (2011)
Keyphrases
- logic circuits
- low power
- power consumption
- low cost
- delay insensitive
- power dissipation
- single chip
- high speed
- low power consumption
- gate array
- digital signal processing
- cmos technology
- vlsi architecture
- power reduction
- vlsi circuits
- micron cmos
- high power
- mixed signal
- asynchronous circuits
- circuit design
- long range
- general purpose