Login / Signup
A layout checking system for large scale integrated circuits.
Kenji Yoshida
Takashi Mitsuhashi
Yasuo Nakada
Toshiaki Chiba
Kiyoshi Ogita
Shinji Nakatsuka
Published in:
DAC (1977)
Keyphrases
</>
integrated circuit
electron beam
real life
small scale
real world
image analysis
real time
decision trees
bayesian networks
low cost
spatial layout
printed circuit boards
layout design