Combine and top down block placement algorithm for hierarchical logic VLSI layout.
Tokinori KozawaChihei MiuraHidekazu TeraiPublished in: DAC (1984)
Keyphrases
- improved algorithm
- preprocessing
- computational complexity
- cost function
- k means
- experimental evaluation
- probabilistic model
- detection algorithm
- theoretical analysis
- learning algorithm
- objective function
- computational cost
- computationally efficient
- fractal encoding
- block wise
- binary tree
- expectation maximization
- linear programming
- worst case
- np hard
- image quality
- signal processing
- hierarchical clustering
- convergence rate
- high accuracy
- genetic algorithm